1. Field of the Invention
The present invention relates generally to performance or power optimization and more specifically to self-learning the optimal power or performance operating point for a chip.
2. Description of the Related Art
Guardbanding the performance of a computer chip (e.g. processor) in all cases is currently the mechanism used to guarantee correct hardware operation under rare worst-case noise event scenarios, which may never happen on some systems and/or workloads and/or physical environments. This leaves performance on the table at all times, making the chip less competitive. Current solutions involve voltage droop detectors or power estimation circuitry to guess a problem might exist and try to proactively react to it. Current solutions do not simultaneously take into account all the effects of the entire operational state of the integrated circuit, such as frequency, voltage, temperature, and manufacturing variability.